Freescale Semiconductor /MKL28T7_CORE1 /PCC1 /PCC_TPM1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as PCC_TPM1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (000)PCS0 (0)INUSE 0 (0)CGC 0 (0)PR

INUSE=0, PR=0, CGC=0, PCS=000

Description

PCC CLKCFG Register

Fields

PCS

Peripheral Clock Source Select

0 (000): Clock is off (or test clock is enabled).

1 (1): OSCCLK - System Oscillator Bus Clock(scg_sosc_slow_clk).

2 (2): SCGIRCLK - Slow IRC Clock(scg_sirc_slow_clk), (maximum is 8MHz).

3 (3): SCGFIRCLK - Fast IRC Clock(scg_firc_slow_clk), (maximum is 48MHz).

6 (6): SCGPCLK System PLL clock (scg_spll_slow_clk).

INUSE

Clock Gate Control

0 (0): Another core is not using this peripheral.

1 (1): Another core is using this peripheral. Software cannot modify the existing clocking configuration.

CGC

Clock Gate Control

0 (0): Clock disabled

1 (1): Clock enabled

PR

Enable

0 (0): Peripheral is not present.

1 (1): Peripheral is present.

Links

() ()